Emily Liang

Computer Science & Mathematics
Turing Scholar at UT Austin

About Me

Emily Liang

Turing Scholar (Computer Science Honors)

I am a Turing Scholar at the University of Texas at Austin, pursuing a B.S. in Computer Science, a B.S. in Mathematics, and a minor in Business. I expect to graduate in May 2028.

Location

Austin, TX

Education

UT Austin

Graduation

May 2028 (expected)

Interests

Rock Climbing, Hiking, and Photography

My work spans optimization, simulation, and systems programming. At Base Power, I developed battery dispatch strategies for the ERCOT electricity market. I also lead Longhorn Racing’s simulation and validation team and mentor UT Austin students as an undergraduate course assistant.

Beyond coding, I am an avid rock climber and hiker, finding that the problem-solving skills I develop on the wall often translate to my technical work. I believe in creating technology that is not just innovative, but also accessible and impactful.

Skills

I use mathematical modeling, data analysis, and systems programming to build and evaluate software, from battery dispatch strategies to operating systems.

Languages

C/C++
Python
Go
Java
JavaScript/TypeScript
Verilog
x86 & ARM Assembly
OCaml

Technologies

Git
Docker
Linux
NumPy & SciPy
Pandas
Matplotlib
PyTorch

Computer Science Coursework

Programming Languages
Artificial Intelligence
Algorithms
Machine Learning
Operating Systems
Computer Architecture
Compilers
Computer Vision

Mathematics Coursework

Probability
Stochastic Processes
Number Theory

Experience

Quantitative Developer Intern

Base Power Company • May 2026 – August 2026

Austin, TX

Developed an optimization-based battery dispatch algorithm under ERCOT market and operational constraints, improving expected profitability by approximately $2/kWh.
Built simulation and cross-validation infrastructure for battery dispatch strategies across historical ERCOT market conditions, reducing backtest error by 15%.
Designed statistical experiments to quantify strategy performance, analyze sensitivity to market conditions, and guide optimization decisions.

Undergraduate Course Assistant

The University of Texas at Austin • August 2026 – Present

Austin, TX

Mentor students in Software Engineering and Freshman Think Lab on software architecture, debugging, testing, version control, and project development.
Lead office hours and conduct code and design reviews, providing individualized technical feedback on implementation and software engineering practices.

Simulation and Validation System Lead

Longhorn Racing Internal Combustion • August 2024 – Present

Austin, TX

Lead a team of 7 engineers responsible for simulation, telemetry, and validation infrastructure for a Formula SAE race car, setting technical priorities and coordinating integration across vehicle systems.
Direct simulation and track-validation efforts across vehicle dynamics, testing, driver development, and race strategy to support engineering design decisions.
Coordinate validation plans with subsystem leads to translate vehicle data and simulation results into model calibration and design recommendations.

Software Engineering Intern

Lockheed Martin Aeronautics • September 2023 – May 2024

Fort Worth, TX

Collaborated with the Air Force Research Laboratory, L3Harris, and Raytheon on research supporting satellite communications capabilities for the F-35 platform.

Projects

Longhorn Racing Lap-Time Simulation

Python · MATLAB

Developed a quasi-steady-state lap-time simulator modeling aerodynamic, vehicle dynamics, and powertrain constraints to predict Formula SAE vehicle performance across race tracks.
Integrated GGV performance envelopes with track trajectories and configurable vehicle models to compute feasible velocity profiles and predicted lap times.
Implemented parameter sweeps to quantify lap-time sensitivity to vehicle design variables and compare engineering configurations.

JPEB: Custom 16-Bit Computer

Rust · Haskell · C · Verilog · Python · Assembly

Designed and implemented a custom 16-bit computer in a team of four, spanning ISA design, processor architecture, compiler tooling, and emulation.
Developed a 6-stage pipelined processor in Verilog and deployed it to an FPGA, implementing hazard detection, data forwarding, pipeline stalls, and control-flow flushing.
Extended the compiler and assembler toolchain and implemented Chrome Dinosaur and Snake using the custom ISA to validate end-to-end hardware and software execution.

View project →

x86 Multicore Operating System Kernel

C++

Built a preemptive multicore x86 operating system kernel supporting concurrent process and thread execution with synchronization primitives.
Implemented virtual memory with demand paging, page caching, swapping, and memory-mapped files.
Developed kernel-level process, thread, file-system, and memory-management system calls.

Resume

Explore my experience in quantitative development, simulation, and systems engineering, along with my education and technical skills.

View Resume